The present disclosure relates to structures and methods of making an array of fin-type PIN diodes.
A PIN diode is a semiconductor diode with a wide, undoped intrinsic region disposed between a p-type doped semiconductor region and an n-type doped semiconductor region. The p-type and n-type regions are typically heavily doped because they are used as ohmic contacts. The wide intrinsic region contrasts with that of a conventional p-n junction diode. The wide intrinsic region makes the PIN diode an inferior rectifier, but makes it a suitable photodetector.
As a photodetector, the PIN diode is reverse biased, carrying only a small dark current or Is leakage. The reverse bias enhances a depletion region of the PIN photodiode that extends across the intrinsic region and deep into the device. When a photon of sufficient energy enters the depletion region of the PIN diode, it creates an electron-hole pair. The reverse bias field then sweeps the charge carriers out of the depletion region, creating a current.
The most common PIN diodes are based on silicon. The silicon PIN diodes are sensitive from about 1100 nm to about 250 nm, corresponding to the near IR spectrum, the visible spectrum and the near UV spectrum. A commercially available silicon photodiode array can include 16 silicon PIN photodiodes and have a total photosensitive area of about 1.175 mm×2.0 mm.
A semiconductor manufacturing process is characterized by its technology node, which relates to the minimum distance between adjacent identical structures of an integrated circuit (IC) chip that can be manufactured by the particular process. For example, the 45 nm technology node refers to the average half-pitch of a memory cell manufactured by the process, according to the International Technology Roadmap for Semiconductors. Semiconductor manufacture is accomplished by photolithographic processes that transfer geometric shapes from a photomask to an underlying surface of a semiconductor wafer, forming the semiconductor devices of an IC chip. In general, semiconductor manufacturers seek to decrease the size of manufactured IC chips by photolithographic processes using increasingly smaller technology nodes, to reduce costs and power consumption.
Currently, a frequently used type of transistor in the manufacture of IC chips is a fin-type field effect transistor (FinFET) that reduces the size or area of the transistor in the horizontal plane by introducing vertical semiconductor elements, such as, a vertical fin-type gate, a vertical doped source and a vertical doped drain. Decreasing the area of the transistor on the chip allows the manufacturer to greatly increase the number of device on the chip, i.e., to increase the density of devices on the chip. The photolithographic manufacturing process of vertical FinFET semiconductor elements is well understood and can be used in the manufacture of other vertical semiconductor devices.
There remains a need to increase the device density of a PIN diode array on an IC chip.